commit 1b2a720506ccf7c30baaeda5d990c29b31e21726
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Aug 7 21:46:02 2006 -0700

    [TG3]: Fix tx race condition
    
    Fix a subtle race condition between tg3_start_xmit() and tg3_tx()
    discovered by Herbert Xu <herbert@gondor.apana.org.au>:
    
    CPU0					CPU1
    tg3_start_xmit()
    	if (tx_ring_full) {
    		tx_lock
    					tg3_tx()
    						if (!netif_queue_stopped)
    		netif_stop_queue()
    		if (!tx_ring_full)
    						update_tx_ring 
    			netif_wake_queue()
    		tx_unlock
    	}
    
    Even though tx_ring is updated before the if statement in tg3_tx() in
    program order, it can be re-ordered by the CPU as shown above.  This
    scenario can cause the tx queue to be stopped forever if tg3_tx() has
    just freed up the entire tx_ring.  The possibility of this happening
    should be very rare though.
    
    The following changes are made:
    
    1. Add memory barrier to fix the above race condition.
    
    2. Eliminate the private tx_lock altogether and rely solely on
    netif_tx_lock.  This eliminates one spinlock in tg3_start_xmit()
    when the ring is full.
    
    3. Because of 2, use netif_tx_lock in tg3_tx() before calling
    netif_wake_queue().
    
    4. Change TX_BUFFS_AVAIL to an inline function with a memory barrier.
    Herbert and David suggested using the memory barrier instead of
    volatile.
    
    5. Check for the full wake queue condition before getting
    netif_tx_lock in tg3_tx().  This reduces the number of unnecessary
    spinlocks when the tx ring is full in a steady-state condition.
    
    6. Update version to 3.65.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit d14cc9a342a8004b0ecfe66f1f12120962b61d8c
Author: Christoph Hellwig <hch@lst.de>
Date:   Mon Aug 7 16:11:48 2006 -0700

    [TG3]: skb->dev assignment is done by netdev_alloc_skb
    
    All caller of netdev_alloc_skb need to assign skb->dev shortly
    afterwards.  Move it into common code.
    
    Signed-off-by: Christoph Hellwig <hch@lst.de>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit a20e9c6291f27cac4a9ab450d124794c012f87d4
Author: David S. Miller <davem@sunset.davemloft.net>
Date:   Mon Jul 31 22:38:16 2006 -0700

    [TG3]: Convert to netdev_alloc_skb
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit b6e77a5346d8a739227ed73c2269966a4fd652b4
Author: Michael Chan <mchan@broadcom.com>
Date:   Tue Jul 25 16:39:12 2006 -0700

    [TG3]: Update version and reldate
    
    Update version to 3.63.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 32d8c5724b7b05c7d8f7386c49432104cc222e32
Author: Michael Chan <mchan@broadcom.com>
Date:   Tue Jul 25 16:38:29 2006 -0700

    [TG3]: Handle tg3_init_rings() failures
    
    Handle dev_alloc_skb() failures when initializing the RX rings.
    Without proper handling, the driver will crash when using a partial
    ring.
    
    Thanks to Stephane Doyon <sdoyon@max-t.com> for reporting the bug and
    providing the initial patch.
    
    Howie Xu <howie@vmware.com> also reported the same issue.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit b9ec6c1b917e2e43a058a78198d54aeca3d71c6f
Author: Michael Chan <mchan@broadcom.com>
Date:   Tue Jul 25 16:37:27 2006 -0700

    [TG3]: Add tg3_restart_hw()
    
    Add tg3_restart_hw() to handle failures when re-initializing the
    device.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit c165b0040502ef0d2b5751eef3cd96ea8210ae4c
Author: John W. Linville <linville@tuxdriver.com>
Date:   Sat Jul 8 13:28:53 2006 -0700

    [TG3]: add amd8131 to "write reorder" chipsets
    
    Add the AMD 8131 bridge to the list of chipsets that reorder writes.
    
    Signed-off-by: John W. Linville <linville@tuxdriver.com>
    Acked-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit b0026624f1aa3e38a887cb483de61f104d600b97
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Jul 3 19:42:14 2006 -0700

    [TG3]: Add ipv6 TSO feature
    
    Enable ipv6 TSO feature on chips that support it.
    
    Update version to 3.61.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 2c6059bca8cf5e7f722d909f2e5edda0491ac604
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu Jun 29 20:16:28 2006 -0700

    [TG3]: Update version and reldate
    
    Update version to 3.61.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 52c0fd834ea0e7c6ef8616ce0a1f85bac4233ed7
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu Jun 29 20:15:54 2006 -0700

    [TG3]: Add TSO workaround using GSO
    
    Use GSO to workaround a rare TSO bug on some chips.  This hardware
    bug may be triggered when the TSO header size is greater than 80
    bytes.  When this condition is detected in a TSO packet, the driver
    will use GSO to segment the packet to workaround the hardware bug.
    
    Thanks to Juergen Kreileder <jk@blackdown.de> for reporting the
    problem and collecting traces to help debug the problem.
    
    And thanks to Herbert Xu <herbert@gondor.apana.org.au> for providing
    the GSO mechanism that happens to be the perfect workaround for this
    problem.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 1661394e78b3b2cc868cd0e89c1066974302aaca
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu Jun 29 20:15:13 2006 -0700

    [TG3]: Turn on hw fix for ASF problems
    
    Clear a bit to enable a hardware fix for some ASF related problem.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit f92905deb9bc89834dac247ca1a0d905ebcf629b
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu Jun 29 20:14:29 2006 -0700

    [TG3]: Add rx BD workaround
    
    Add workaround to limit the burst size of rx BDs being DMA'ed to the
    chip.  This works around hardware errata on a number of 5750, 5752,
    and 5755 chips.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 29315e8770c20cbfe607ad962d87867115a44555
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu Jun 29 20:12:30 2006 -0700

    [TG3]: Add tg3_netif_stop() in vlan functions
    
    Add tg3_netif_stop() when changing the vlgrp (vlan group) pointer. It
    is necessary to quiesce the device before changing that pointer.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 00b7050426da8e7e58c889c5c80a19920d2d41b3 
Author: Michael Chan <mchan@broadcom.com> 
Date:   Sat Jun 17 21:58:45 2006 -0700

    [TG3]: Convert to non-LLTX
    
    Herbert Xu pointed out that it is unsafe to call netif_tx_disable()
    from LLTX drivers because it uses dev->xmit_lock to synchronize
    whereas LLTX drivers use private locks.
    
    Convert tg3 to non-LLTX to fix this issue. tg3 is a lockless driver
    where hard_start_xmit and tx completion handling can run concurrently
    under normal conditions. A tx_lock is only needed to prevent
    netif_stop_queue and netif_wake_queue race condtions when the queue
    is full.
    
    So whether we use LLTX or non-LLTX, it makes practically no
    difference.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit c71302d61f844f766a44e1b04258086cc41f624e 
Author: Michael Chan <mchan@broadcom.com> 
Date:   Sat Jun 17 21:55:55 2006 -0700

    [TG3]: Remove unnecessary tx_lock
    
    Remove tx_lock where it is unnecessary. tg3 runs lockless and so it
    requires interrupts to be disabled and sync'ed, netif_queue and NAPI
    poll to be stopped before the device can be reconfigured. After
    stopping everything, it is no longer necessary to get the tx_lock.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 9cb3528cdbffc513eb9fb8faa45d41e397355830 
Author: Michael Chan <mchan@broadcom.com> 
Date:   Sat Jun 17 21:28:28 2006 -0700

    [TG3]: update version and reldate
    
    Update version to 3.60.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit df3e6548186f0baa727cd6d3a492891854bd31f2 
Author: Michael Chan <mchan@broadcom.com> 
Date:   Fri May 26 17:48:07 2006 -0700

    [TG3]: Add recovery logic when MMIOs are re-ordered
    
    Add recovery logic when we suspect that the system is re-ordering
    MMIOs. Re-ordered MMIOs to the send mailbox can cause bogus tx
    completions and hit BUG_ON() in the tx completion path.
    
    tg3 already has logic to handle re-ordered MMIOs by flushing the MMIOs
    that must be strictly ordered (such as the send mailbox).  Determining
    when to enable the flush is currently a manual process of adding known
    chipsets to a list.
    
    The new code replaces the BUG_ON() in the tx completion path with the
    call to tg3_tx_recover(). It will set the TG3_FLAG_MBOX_WRITE_REORDER
    flag and reset the chip later in the workqueue to recover and start
    flushing MMIOs to the mailbox.
    
    A message to report the problem will be printed. We will then decide
    whether or not to add the host bridge to the list of chipsets that do
    re-ordering.
    
    We may add some additional code later to print the host bridge's ID so
    that the user can report it more easily.
    
    The assumption that re-ordering can only happen on x86 systems is also
    removed.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 30b6c28d2aca4669f2e609ad5d77ea2a6cf0dd3a 
Author: Michael Chan <mchan@broadcom.com> 
Date:   Fri May 26 17:44:45 2006 -0700

    [TG3]: Add 5786 PCI ID
  
    Add PCI ID for BCM5786 which is a variant of 5787.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit f49639e643e69ff233b14966b8d48541d2e17517
Author: David S. Miller <davem@sunset.davemloft.net>
Date:   Fri Jun 9 11:58:36 2006 -0700

    [TG3]: Handle Sun onboard tg3 chips more correctly.
    
    Get rid of all the SUN_570X logic and instead:
    
    1) Make sure MEMARB_ENABLE is set when we probe the SRAM
       for config information.  If that is off we will get
       timeouts.
    
    2) Always try to sync with the firmware, if there is no
       firmware running do not treat it as an error and instead
       just report it the first time we notice this condition.
    
    3) If there is no valid SRAM signature, assume the device
       is onboard by setting TG3_FLAG_EEPROM_WRITE_PROT.
    
    Update driver version and release date.
    
    With help from Michael Chan and Fabio Massimo Di Nitto.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 948c51e6a8d71df99ef57c61bc80dc7c20cbf7bc
Author: Michael Chan <mchan@broadcom.com>
Date:   Sun Jun 4 02:51:39 2006 -0700

    [PATCH] MAINTAINERS: Add entries for BNX2 and TG3
    
    From: "Michael Chan" <mchan@broadcom.com>
    
    Add maintainer entries for Broadcom BNX2 and TG3 drivers.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Cc: "David S. Miller" <davem@davemloft.net>
    Acked-by: Jeff Garzik <jeff@garzik.org>
    Signed-off-by: Andrew Morton <akpm@osdl.org>
    Signed-off-by: Linus Torvalds <torvalds@osdl.org>

commit 463d305bc51b8f5d0750a17ec0c9caf5181ec6d4
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon May 22 16:36:27 2006 -0700

    [TG3]: Add some missing rx error counters
    
    Add some missing rx error counters for 5705 and newer chips.
    
    Update version to 3.58.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit ef34814426862c41c061520d4ac833be5914b5ba 
Author: Karsten Keil <kkeil@suse.de> 
Date:   Fri May 12 12:49:08 2006 -0700

    [TG3]: ethtool always report port is TP.
    
    Even with fiber cards ethtool reports that the connected port is TP,
    the patch fix this.
    
    Signed-off-by: Karsten Keil <kkeil@suse.de>
    Acked-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>
  
commit a50bb7b9af9a7c39b2aba15678eb686ae428718c
Author: Jesper Juhl <jesper.juhl@gmail.com>
Date:   Tue May 9 23:14:35 2006 -0700

    [TG3]: Fix possible NULL deref in tg3_run_loopback().
    
    tg3_run_loopback doesn't check that dev_alloc_skb() returns anything
    useful.
    
    Even if dev_alloc_skb() fails to return an skb to us we'll happily go
    on and assume it did, so we risk dereferencing a NULL pointer.  Much
    better to fail gracefully by returning -ENOMEM than crashing here.
    
    Signed-off-by: Jesper Juhl <jesper.juhl@gmail.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit b276764091cf241cf0b31e8cb76c67dcf9a9c1d8
Author: Michael Chan <mchan@broadcom.com>
Date:   Sat Apr 29 19:01:06 2006 -0700

    [TG3]: Update version and reldate
    
    Update version to 3.57.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit f6d9a2565bc754043f43b8f51b19f77ee0269411
Author: Michael Chan <mchan@broadcom.com>
Date:   Sat Apr 29 19:00:24 2006 -0700

    [TG3]: Fix bug in nvram write
    
    Fix bug in nvram write function. If the starting nvram address offset
    happens to be the last dword of the page, the NVRAM_CMD_LAST bit will
    not get set in the existing code. This patch fixes the bug by changing
    the "else if" to "if" so that the last dword condition always gets
    checked.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 8e7a22e3eb49042c048f24bab40cf5cf8915487d
Author: Gary Zambrano <zambrano@broadcom.com>
Date:   Sat Apr 29 18:59:13 2006 -0700

    [TG3]: Add reset_phy parameter to chip reset functions
    
    Add a reset_phy parameter to tg3_reset_hw() and tg3_init_hw(). With
    the full chip reset during MAC address change, the automatic PHY reset
    during chip reset will cause a link down and bonding will not work
    properly as a result. With this reset_phy parameter, we can do a chip
    reset without link down when changing MAC address or MTU.
    
    Signed-off-by: Gary Zambrano <zambrano@broadcom.com>
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 58712ef9f2cbaaeac5b32ac11810a4bbd0eeacc5
Author: Michael Chan <mchan@broadcom.com>
Date:   Sat Apr 29 18:58:01 2006 -0700

    [TG3]: Reset chip when changing MAC address
    
    Do the full chip reset when changing MAC address if ASF is enabled.
    
    ASF sometimes uses a different MAC address than the driver. Without
    the reset, the ASF MAC address may be overwritten when the driver's
    MAC address is changed.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit c424cb249dae10fb7f118f89091f1329b62b92f4
Author: Michael Chan <mchan@broadcom.com>
Date:   Sat Apr 29 18:56:34 2006 -0700

    [TG3]: Add phy workaround
    
    Add some PHY workaround code to reduce jitter on some PHYs.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit c8e1e82b6a97ad44517517aa58b7b794ead0bf33
Author: Michael Chan <mchan@broadcom.com>
Date:   Sat Apr 29 18:55:17 2006 -0700

    [TG3]: Call netif_carrier_off() during phy reset
    
    Add netif_carrier_off() call during tg3_phy_reset(). This is needed
    to properly track the netif_carrier state in cases where we do a
    PHY reset with interrupts disabled. The SerDes code will not run
    properly if the netif_carrier state is wrong.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit bbadf503d7c7e6efe0a4cd731f8855ba08276215
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu Apr 6 21:46:34 2006 -0700

    [TG3]: Speed up SRAM access (2nd version)
    
    Speed up SRAM read and write functions if possible by using MMIO
    instead of config. cycles. With this change, the post reset signature
    done at the end of D3 power change must now be moved before the D3
    power change.
    
    IBM reported a problem on powerpc blades during ethtool self test that
    was caused by the memory test taking excessively long. Config.  cycles
    are very slow on powerpc and the memory test can take more than 10
    seconds to complete using config. cycles.
    
    David Miller informed me that an earlier version of the patch caused
    problems on sparc64 systems with built-in tg3 chips. This version
    fixes the problem by excluding all SUN built-in tg3 chips from doing
    MMIO SRAM access.
    
    TG3_FLAG_EEPROM_WRITE_PROT is also set unconditionally when
    TG3_FLG2_SUN_570X is set. This should be sane as all SUN chips are
    built-in and do not require Vaux switching.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit d2d746f83b74022a50d28f7f0f496842c9cde330
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu Apr 6 21:45:39 2006 -0700

    [TG3]: Kill some less useful flags
    
    Kill the TG3_FLAG_NO_{TX|RX}_PSEUDO_CSUM flags because they are not
    very useful. This will free up some bits for new flags.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 8c692237903c38c7fcb96250c101ee48c32e76bf 
Author: Adrian Bunk <bunk@stusta.de> 
Date:   Wed Apr 5 22:21:04 2006 -0700

    [TG3]: Fix a memory leak.
    
    This patch fixes a memory leak (buf wasn't freed) spotted by the
    Coverity checker.
    
    Signed-off-by: Adrian Bunk <bunk@stusta.de>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 5c516c10198a8258c0c40f200a5a01a3fa0a0de4
Author: David S. Miller <davem@sunset.davemloft.net>
Date:   Sat Apr 1 00:33:31 2006 -0800

    [TG3]: Update driver version and reldate.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 758a613936223699f99081fc75eff7cf67b208f6
Author: David S. Miller <davem@sunset.davemloft.net>
Date:   Sat Apr 1 00:32:56 2006 -0800

    [TG3]: Revert "Speed up SRAM access"
    
    Undo commit 100c4673307f5806788791b9b886877c806afd96
    
    MMIOs timeout more quickly that PCI config cycles and some
    of these SRAM accesses can take a very long time, triggering
    the MMIO limits on some sparc64 PCI controllers and thus
    resulting in bus timeouts and bus errors.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 5d9428de1a9785f10a4339f80b717be665ba51c7 
Author: Eric Sesterhenn <snakebyte@gmx.de> 
Date:   Sun Apr 2 13:52:48 2006 +0200

    BUG_ON() Conversion in drivers/net/
    
    this changes if() BUG(); constructs to BUG_ON() which is
    cleaner, contains unlikely() and can better optimized away.
    
    Signed-off-by: Eric Sesterhenn <snakebyte@gmx.de>
    Signed-off-by: Adrian Bunk <bunk@stusta.de>

commit c514b510901a741dae95d32403e8db622e9623cc 
Author: Michael Chan <mchan@broadcom.com> 
Date:   Mon Mar 28 23:21:07 2006 -0800

    [TG3]: Update version and reldate
    
    Update version to 3.55.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 156ae6d67bc86ccb5727c0ba873f5879eb75c766 
Author: Michael Chan <mchan@broadcom.com> 
Date:   Mon Mar 28 23:20:14 2006 -0800

    [TG3]: Skip timer code during full lock
    
    Skip the main timer code if interrupts are disabled in the full lock
    state.
  
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit dd22e94ab4cc0cb232f928efee614a08e88e5d3d 
Author: Michael Chan <mchan@broadcom.com> 
Date:   Mon Mar 28 23:19:00 2006 -0800

    [TG3]: Speed up SRAM access
    
    Speed up SRAM read and write functions if possible by using MMIO
    instead of config. cycles. With this change, the post reset signature
    done at the end of D3 power change must now be moved before the D3
    power change.
    
    IBM reported a problem on powerpc blades during ethtool self test
    that was caused by the memory test taking excessively long. Config.
    cycles are very slow on powerpc and the memory test can take more
    than 10 seconds to complete using config. cycles. As a result, NETDEV
    WATCHDOG can be triggered during self test and the chip can end up in
    a funny state.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 53add9b6da7ec94e04ff0422998fc5c230c48681 
Author: Michael Chan <mchan@broadcom.com> 
Date:   Mon Mar 28 23:17:27 2006 -0800

    [TG3]: Fix PHY loopback on 5700
    
    Fix PHY loopback failure on some 5700 devices.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 53add9b6da7ec94e04ff0422998fc5c230c48681 
Author: Michael Chan <mchan@broadcom.com> 
Date:   Mon Mar 28 23:16:49 2006 -0800

    [TG3]: Fix bug in 40-bit DMA workaround code
    
    Need to check the TG3_FLAG_40BIT_DMA_BUG flag in the workaround code
    path instead of device flags.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit e5d5b025084b12498a8fce16bdf6995a45a568d9 
author Michael Chan <mchan@broadcom.com> 
Date:   Mon Mar 28 23:14:53 2006 -0800

    [TG3]: Fix probe failure due to invalid MAC address
    
    Some older bootcode in some devices may report 0 MAC address in
    SRAM when booting up from low power state. This patch fixes the
    problem by checking for a valid MAC address in SRAM and falling back
    to NVRAM if necessary.
    
    Thanks to walt <wa1ter@myrealbox.com> for reporting the problem
    and helping to debug it.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>
          
commit 95381c893dd71a534ab56f09b12a4e2118aa0f32 
Author: David S. Miller <davem@sunset.davemloft.net> 
Date:   Thu Mar 23 01:29:06 2006 -0800

    [TG3]: Update driver version and reldate.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit d3c7b886978bef42f5ea487dec376c482d3cd7e3 
Author: Michael Chan <mchan@broadcom.com> 
Date:   Thu Mar 23 01:28:25 2006 -0800

    [TG3]: Add 5755 nvram support
    
    Add 5755 nvram support.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit af36e6b6d7f4ad7a5ccfd14dfa71ec941255f93d 
Author: Michael Chan <mchan@broadcom.com> Thu, 23 Mar 2006 01:28:06 -0800 
Date:   Thu Mar 23 01:28:06 2006 -0800

    [TG3]: Add 5755 support
    
    Add support for new chip 5755 which is very similar to 5787.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 056755f4d73d49b4adcbb8ecdaf75138cf166bd3 
Author: David S. Miller <davem@sunset.davemloft.net> 
Date:   Wed Mar 22 01:07:53 2006 -0800

    [TG3]: Bump driver version and reldate.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 15c3b696101992c4d69962325f0e91647164427f 
Author: Michael Chan <mchan@broadcom.com> 
Date:   Wed Mar 22 01:06:52 2006 -0800

    [TG3]: Skip phy power down on some devices
    
    Some PHYs should not be powered down in tg3_set_power_state() because
    of bugs or other hardware limitations.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit caf636c760b33c72ebf018ff03c1b0d79ea6656a 
Author: Michael Chan <mchan@broadcom.com> 
Date:   Wed Mar 22 01:05:31 2006 -0800

    [TG3]: Fix SRAM access during tg3_init_one()
    
    5700 and 5701 will not return correct SRAM data when the chip is in
    D3hot power state. tg3_get_eeprom_hw_cfg() must first put the device
    in D0 before reading SRAM.
    
    Thanks to Thomas Chenault at Dell for noticing this problem.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 30ca3e376e82cc44488b1d377adfb10b5818548e 
Author: David S. Miller <davem@sunset.davemloft.net>
Date:   Mon Mar 20 23:02:36 2006 -0800

    [TG3]: Don't mark tg3_test_registers() as returning const.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 81789ef5c9a435fbf94224987efe6fbb97ffab09 
Author: Adrian Bunk <bunk@stusta.de> Mon, 20 Mar 2006 23:00:14 -0800 
Date:   Mon Mar 20 23:00:14 2006 -0800

    [TG3]: make drivers/net/tg3.c:tg3_request_irq() static
    
    This patch makes the needlessly global function tg3_request_irq()
    static.
    
    Signed-off-by: Adrian Bunk <bunk@stusta.de>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 59f1741e541bf4f6139599389610a70de49c3ad2 
Author: Jeff Mahoney <jeffm@suse.com>
Date:   Mon Mar 20 22:39:21 2006 -0800 

    [TG3]: netif_carrier_off runs too early; could still be queued when init fails
    
    Move the netif_carrier_off() call from tg3_init_one()->
    tg3_init_link_config() to tg3_open() as is the convention for most other
    network drivers.
    
    I was getting a panic after a tg3 device failed to initialize due to DMA
    failure.  The oops pointed to the link watch queue with spinlock debugging
    enabled.  Without spinlock debugging, the Oops didn't occur.
    
    I suspect that the link event was getting queued but not executed until
    after the DMA test had failed and the device was freed.  The link event was
    then operating on freed memory, which could contain anything.  With this
    patch applied, the Oops no longer occurs.
    
    [ Based upon feedback from Michael Chan, we move netif_carrier_off()
    to the end of tg3_init_one() instead of moving it to tg3_open() -DaveM ]
    
    Signed-off-by: Jeff Mahoney <jeffm@suse.com>
    Signed-off-by: Andrew Morton <akpm@osdl.org>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit e9e678006ee865b0f7e53069b0e519141a710a6e 
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Mar 20 22:29:52 2006 -0800 

    [TG3]: update version and reldate
    
    Update version to 3.52.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit c4e6575c78b83928c470d81b271909084a2efd37 
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Mar 20 22:29:32 2006 -0800 

    [TG3]: Add firmware version info
    
    Add fw_version information to ethtool -i.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 1820180b0e59cc48019414018b180518059f50d3 
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Mar 20 22:29:15 2006 -0800 

    [TG3]: nvram cleanup
    
    Some nvram related cleanup:
    
    1. Add a tg3_nvram_read_swab() since swabing the data is frequently
    done.
    
    2. Add a function to convert nvram address to physical address
    instead of doing it in 2 separate places.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 79f4d13a15774c2d442b619bad95a4c612eed4f3 
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Mar 20 22:28:57 2006 -0800 

    [TG3]: Fixup memory test for 5787
    
    Ethtool memory test on 5787 requires a new memory table.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit fcfa0a32c767219c1bdad621ef4a3aff1904cbbd 
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Mar 20 22:28:41 2006 -0800 

    [TG3]: Add new one-shot MSI handler
    
    Support one-shot MSI on 5787.
    
    This one-shot MSI idea is credited to David Miller. In this mode, MSI
    disables itself automatically after it is generated, saving the driver
    a register access to disable it for NAPI.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 9c27dbdf64cba05d0cacc343118a7fd01d4b82f7 
author Michael Chan <mchan@broadcom.com>
Date:   Mon Mar 20 22:28:27 2006 -0800 

    [TG3]: Add ipv6 checksum support
    
    Support ipv6 tx csum on 5787 by setting NETIF_F_HW_CSUM.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 5a6f3074c2ea5a7b4ff5b18f0e1fd9b1257e1a29 
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Mar 20 22:28:05 2006 -0800 

    [TG3]: Add new hard_start_xmit
    
    Support 5787 hardware TSO using a new flag TG3_FLG2_HW_TSO_2.
    
    Since the TSO interface is slightly different and these chips have
    finally fixed the 4GB DMA problem and do not have the 40-bit DMA
    problem, a new hard_start_xmit is used for these chips. All previous
    chips will use the old hard_start_xmit that is now renamed
    tg3_start_xmit_dma_bug().
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 1b27777a9b9b2b6d1c06000b7a31262d198b4238 
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Mar 20 22:27:48 2006 -0800 

    [TG3]: Add 5787 nvram support
    
    Support additional nvrams and new nvram format for 5787 and 5754.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit d9ab5ad12b0d865bdb1b750d81192d34465541e9 
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Mar 20 22:27:35 2006 -0800 

    [TG3]: Add 5787 and 5754 basic support
    
    Add basic support for 2 new chips 5787 and 5754.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 4f81c32b028aecd818634b1ef36aae3b2b3e66ce 
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Mar 20 21:33:42 2006 -0800 

    [TG3]: Fix tg3_get_ringparam()
    
    Fix-up tg3_get_ringparam() to return the correct parameters.
    
    Set the jumbo rx ring parameter only if it is supported by the chip
    and currently in use.
    
    Add missing value for tx_max_pending, noticed by Rick Jones.
    
    Update version to 3.51.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit e75f7c900944aa90831f6d343ca40090a68b56dd 
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Mar 20 21:33:26 2006 -0800 

    [TG3]: Add some missing netif_running() checks
    
    Add missing netif_running() checks in tg3's dev->set_multicast_list()
    and dev->set_mac_address(). If not netif_running(), these 2 calls can
    simply return 0 after storing the new settings if required.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 2e2e4f5c996d577383c5cb584b153b39f4961155 
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Mar 20 17:48:18 2006 -0800 

    [TG3]: Update version and reldate
    
    Update version to 3.50.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit bc1c756741b065cfebf850e4164c0e2aae9d527f 
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Mar 20 17:48:03 2006 -0800 

    [TG3]: Support shutdown WoL.
    
    Support WoL during shutdown by calling
    tg3_set_power_state(tp, PCI_D3hot) during tg3_close().
    
    Change the power state parameter to pci_power_t type and use
    constants defined in pci.h.
    
    Certain ethtool operations cannot be performed after tg3_close()
    because the device will go to low power state. Add return -EAGAIN
    in such cases where appropriate.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 4e3a7aaa28db952392814f889dfbd25672266d29 
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Mar 20 17:47:44 2006 -0800 

    [TG3]: Enable TSO by default
    
    Enable TSO by default on newer chips that support TSO in hardware.
    Leave TSO off by default on older chips that do firmware TSO because
    performance is slightly lower.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit d4d2c558fd3e1f5e386b153f194aa8f0be496c77 
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Mar 20 17:47:20 2006 -0800 

    [TG3]: Add support for 5714S and 5715S
    
    Add support for 5714S and 5715S.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 72b845e04e99298e5179b31e8de16afed52a2627 
Author: David S. Miller <davem@sunset.davemloft.net>
Date:   Mon Mar 20 01:14:27 2006 -0800 

    [TG3]: Do not try to access NIC_SRAM_DATA_SIG on Sun parts.
    
    Sun does't put an SEEPROM behind the tigon3 chip, among other things,
    so accesses to these areas just give bus timeouts.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 4a29cc2e503b33a1e96db4c3f9a94165f153f259
Author: Michael Chan <mchan@broadcom.com>
Date:   Sun Mar 19 13:21:12 2006 -0800

    [TG3]: 40-bit DMA workaround part 2
    
    The 40-bit DMA workaround recently implemented for 5714, 5715, and
    5780 needs to be expanded because there may be other tg3 devices
    behind the EPB Express to PCIX bridge in the 5780 class device.
    
    For example, some 4-port card or mother board designs have 5704 behind
    the 5714.
    
    All devices behind the EPB require the 40-bit DMA workaround.
    
    Thanks to Chris Elmquist again for reporting the problem and testing
    the patch.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 0ade309be739eceedc4812798da09d698a59867d 
Author: Adrian Bunk <bunk@stusta.de> 
Date:   Sat Mar 11 18:49:38 2006 -0800 

    [TG3] tg3_bus_string(): remove dead code
    
    The Coverity checker spotted this dead code (note that (clock_ctrl == 7) 
    is already handled above).
    
    Signed-off-by: Adrian Bunk <bunk@stusta.de>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 72f2afb8a6858edd9335cd158eb21053a0c2c39a 
Author: Michael Chan <mchan@broadcom.com> 
Date:   Mon Mar 6 19:28:35 2006 -0800 

    [TG3]: Add DMA address workaround
    
    Add DMA workaround for chips that do not support full 64-bit DMA
    addresses.
    
    5714, 5715, and 5780 chips only support DMA addresses less than 40
    bits. On 64-bit systems with IOMMU, set the dma_mask to 40-bit so
    that pci_map_xxx() calls will map the DMA address below 40 bits if
    necessary. On 64-bit systems without IOMMU, set the dma_mask to
    64-bit and check for DMA addresses exceeding the limit in
    tg3_start_xmit().
    
    5788 only supports 32-bit DMA so need to set the mask appropriately
    also.
    
    Thanks to Chris Elmquist at SGI for reporting and helping to debug
    the problem on 5714.
    
    Thanks to David Miller for explaining the HIGHMEM and DMA stuff.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 051d3cbd96909b2fe6b5038e7bbe77f41356db05
Author: David S. Miller <davem@davemloft.net>
Date:   Mon Feb 27 12:51:27 2006 -0800 

    [TG3]: Fix Sun tg3 variant detection.
    
    Some Sun parts don't have PCI_VENDOR_ID_SUN in the subsystem
    vendor ID.  So add another fallback test, which is the name
    of the OBP firmware device tree node.  If it's a Sun part we'll
    get "network", else it will be named "ethernet".
   
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 6e2be3ea4fab4d1c02e369719311e8d7ae6cc7c1 
Author: David S. Miller <davem@sunset.davemloft.net> 
Date:   Thu Feb 2 17:29:59 2006 -0800 

    [TG3]: Update driver version and release date.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 7faa006f94fda56a587242b2a22fa19abf840222 
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu Feb 2 17:29:28 2006 -0800 

    [TG3]: Flush tg3_reset_task()
    
    Make sure tg3_reset_task() is flushed in the close and suspend paths
    as noted by Jeff Garzik.
    
    In the close path, calling flush_scheduled_work() may cause deadlock
    if linkwatch_event() is on the workqueue. linkwatch_event() will try
    to get the rtnl_lock() which is already held by tg3_close(). So
    instead, we set a flag in tg3_reset_task() and tg3_close() polls
    the flag until it is cleared.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit ec41c7dfd525468decb9da9281dbc9ed82d98c98 
Author: Michael Chan <mchan@broadcom.com>
Date:   Tue Jan 17 02:40:55 2006 -0800 

    [TG3]: Refine nvram locking
    
    Add nvram lock count so that calls to tg3_nvram_lock()/unlock() can
    be nested. Add error checking to all callers of tg3_nvram_lock()
    where appropriate. To prevent nvram lock failures after halting the
    firmware, it is also necessary to release firmware's nvram lock in
    tg3_halt_cpu().
    
    Update version to 3.48.
    
    Based on David Miller's initial patch.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit fd30333d0fab9e870af89e112454996c188655e9
Author: Alexey Dobriyan <adobriyan@gmail.com>
Date:   Tue Jan 3 14:19:25 2006 -0800

    [TG3]: fixup tot_len calculation
    
    Turning struct iphdr::tot_len into __be16 added sparse warning.
    
    Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit a8b554e75b0c14d5e12a11eaea604e536f49da29
Author: David S. Miller <davem@sunset.davemloft.net>
Date:   Wed Dec 28 13:05:41 2005 -0800

    [TG3]: Update driver version and reldate.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 091465d7514893a55dcf63e420698b21159c39a7
Author: Chris Elmquist <chrise@sgi.com>
Date:   Tue Dec 20 13:25:19 2005 -0800

    [TG3]: ethtool -d hangs PCIe systems
    
    Resubmitting after recommendation to use GET_REG32_1() instead of
    GET_REG32_LOOP(..., 1).  Retested.  Problem remains fixed.
    
    Prevent tg3_get_regs() from reading reserved and undocumented registers
    at RX_CPU_BASE and TX_CPU_BASE offsets which caused hostile behavior
    on PCIe platforms.
    
    Acked-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 38690194bc897dd60a61a71b15e861e13b5d8bdd
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Dec 19 16:27:28 2005 -0800

    [TG3]: Fix ethtool memory test
    
    Skip the memory 0xb50 to 0x1000 during "ethtool -t" memory test.
    Overwriting memory in this region can cause ASF problems.
    
    Update version and release date.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit b401e9e2ec44a5fc1d8053546276bff584b7118e
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Dec 19 16:27:04 2005 -0800

    [TG3]: Add tw32_wait_f() for some sensitive registers
    
    The tw32_f() function (register write with immediate read flush) can
    hang when used on some registers to switch clock frequencies and
    power. A new tw32_wait_f() is added for such registers with the
    delay before the read and after the read.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit dc56b7d46dd2b303a844166ef931270b882bf08c
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Dec 19 16:26:28 2005 -0800

    [TG3]: Some low power fixes
    
    Add some missing workarounds in tg3_set_power_state():
    
    1. Workaround to prevent overdrawing current on 5714.
    
    2. Do not power down 5700's PHY because of hw limitation.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 8c2dc7e1e7213c55f1b97eba09de6c0cee9ad12f
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Dec 19 16:26:02 2005 -0800

    [TG3]: Fix peer device handling
    
    Locate the pdev_peer for dual port 5714 NIC devices in addition to
    5704 devices. The name is also changed to tg3_find_peer() from
    tg3_find_5704_peer(). It is also necessary to call netdev_priv() to
    get to the peer's private tg3 structure.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 6921d201f77e14848df2eaa597e26525f468abea
Author: Michael Chan <mchan@broadcom.com>
Date:   Tue Dec 13 21:15:53 2005 -0800

    [TG3]: Fix low power state
    
    Fix the following bugs in tg3_set_power_state():
    
    1. Both WOL and ASF flags require switching to aux power.
    
    2. Add a missing handshake with firmware to enable WOL.
    
    3. Turn off the PHY if both WOL and ASF are disabled.
    
    4. Add nvram arbitration before halting the firmware.
    
    5. Fix tg3_setup_copper_phy() to switch to 100Mbps when
       changing to low power state.
    
    Update revision and date.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 16fe9d74f14ed74af778c5db7f9129e29916f4a7
Author: Michael Chan <mchan@broadcom.com>
Date:   Tue Dec 13 21:09:54 2005 -0800

    [TG3]: Fix 5704 single-port mode
    
    If the dual-port 5704 is configured as a single-port device with
    only one PCI function, it would trigger a BUG() condition in
    tg3_find_5704_peer(). This fixes the problem by returning its
    own pdev if the peer cannot be found.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 6a9eba15f51c56da637e45ea1316eaa2a848986a
Author: Michael Chan <mchan@broadcom.com>
Date:   Tue Dec 13 21:08:58 2005 -0800

    [TG3]: Fix suspend and resume
    
    Fix tg3_suspend() and tg3_resume() by clearing and setting the
    TG3_FLAG_INIT_COMPLETE flag when appropriate. tg3_set_power_state()
    looks at TG3_FLAG_INIT_COMPLETE on the peer device to determine
    when to appropriately switch to aux power.  
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 381291b7d3e17ac966498312dc571dcca1b93efc
Author: Michael Chan <mchan@broadcom.com>
Date:   Tue Dec 13 21:08:21 2005 -0800

    [TG3]: Fix nvram arbitration bugs.
    
    The nvram arbitration rules were not strictly followed in a few places
    and this could lead to reading corrupted values from the nvram.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>
    
commit 1f064a87c80c86bd3878e6633de61e8b71aa6788
Author: Stephen Hemminger <shemminger@osdl.org>
Date:   Tue Dec 6 17:36:44 2005 -0800

    [TG3]: remove warning on race
    
    [ Move assosciated code comment to the correct spot, and
      update driver version and release date -DaveM ]
    
    Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit f9a5f7d3f3319aac02a7a36a2fea10bd33c3d16a
Author: Tobias Klauser <tklauser@nuerscht.ch>
Date:   Sat Oct 29 15:09:26 2005 +0200

    [PATCH] drivers/net/tg3: Use the DMA_{32,64}BIT_MASK constants
    
    This one from my DMA_{32,64}BIT_MASK series did not seem to make it
    through to upstream.
    
    Use the DMA_{32,64}BIT_MASK constants from dma-mapping.h when calling
    pci_set_dma_mask() or pci_set_consistent_dma_mask()
    This patch includes dma-mapping.h explicitly because it caused errors
    on some architectures otherwise.
    See http://marc.theaimsgroup.com/?t=108001993000001&r=1&w=2 for details
    
    Signed-off-by: Tobias Klauser <tklauser@nuerscht.ch>
    Signed-off-by: Jeff Garzik <jgarzik@pobox.com>

commit 37ff238d68683d42e7363eee3303773906c336d9
Author: Michael Chan <mchan@broadcom.com>
Date:   Wed Oct 26 15:49:51 2005 -0700

    [PATCH] tg3: update version and minor fixes
    
    Update version and reldate and add more sanity checking to
    tg3_set_settings().
    
    Signed-off-by: Gary Zambrano <zambrano@broadcom.com>
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: Jeff Garzik <jgarzik@pobox.com>

commit 28fbef78a420acdea20570d31f3bdcbfa0cac0d2
Author: Michael Chan <mchan@broadcom.com>
Date:   Wed Oct 26 15:48:35 2005 -0700

    [PATCH] tg3: fix ASF heartbeat
    
    Change the ASF heart beat to 5 seconds for faster detection of system
    crash. The driver sends the heartbeat every 2 seconds and the ASF
    firmware will timeout and reset the device if no heartbeat is received
    after 5 seconds. The old scheme of 2 minutes is ineffective.
    
    tg3_write_mem_fast() is added to speed up the IO to send the heartbeat.
    When no workaround is needed, it will use direct MMIO to memory space
    to write to memory.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: Jeff Garzik <jgarzik@pobox.com>

commit a4e2b347848bf626b822599329933887dc90e50f
Author: Michael Chan <mchan@broadcom.com>
Date:   Wed Oct 26 15:46:52 2005 -0700

    [PATCH] tg3: add 5714/5715 support
    
    Add complete support for 5714/5715. These chips are very similar to
    5780 so the changes are very trivial. A TG3_FLG2_5780_CLASS flag is
    added to identify these chips.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: Jeff Garzik <jgarzik@pobox.com>

commit ed39f731ab2e77e58122232f6e27333331d7793d
Author: David S. Miller <davem@sunset.davemloft.net>
Date:   Mon Oct 3 16:25:23 2005 -0700

    [TG3]: Update driver version and release date.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 399de50bbbb2501a6db43daaa8a2dafbc9bcfe0c
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Oct 3 14:02:39 2005 -0700

    [TG3]: Refine AMD K8 write-reorder chipset test.
    
    Test for VIA K8T800 north bridge instead of AMD K8 HyperTransport
    bridge based on new information from Andi Kleen. The AMD
    HyperTransport interface is not responsible for PCI transactions
    and so the re-ordering is more likely done by the VIA north bridge.
    This code is subject to change if we get more information from AMD
    or VIA.
    
    PCI Express devices are excluded from doing the read flush since all
    chipsets in the write_reorder list are PCI chipsets.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit c8a6c2963982c68475f409aeee21aa80b923cb9c
Author: David S. Miller <davem@sunset.davemloft.net>
Date:   Tue Sep 27 12:13:38 2005 -0700

    [TG3]: Update driver version and release date.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit f9804ddbeec2ea709255830a8822bfb4e7584f6a
Author: Michael Chan <mchan@broadcom.com>
Date:   Tue Sep 27 12:13:10 2005 -0700

    [TG3]: misc. fixes
    
    Fix interrupt test handler by adding check for IRQ assertion in
    PCI_STATE register in addition to the status block updated bit.
    
    Add test for valid ethernet address in tg3_set_mac_addr().
    
    Add tg3_bus_string() to setup the PCI bus speed/width string for all
    PCI/PCIX/PCI Express devices. This is used to print the bus type
    during init_one().
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit c94e39418ab6eccf863581f4e0d847da0080b2d3
Author: Michael Chan <mchan@broadcom.com>
Date:   Tue Sep 27 12:12:42 2005 -0700

    [TG3]: 5780 PHY fixes
    
    Fix 5780 PHY related problems:
    
    1. MAC_RX_MODE reset must be done before setting up the MAC_MODE
       register on 5705_PLUS chips or the chip will stop receiving after
       a while. The MAC_RX_MODE reset is needed to prevent intermittently
       losing the first receive packet on serdes chips.
    
    2. Skip MAC loopback test on 5780 because of hardware errata. Normal
       traffic including PHY loopback is not affected by the errata.
    
    3. PHY loopback fails intermittently on 5708S and this is fixed by
       putting the PHY in loopback mode first before programming the MAC
       mode register. A MAC_RX_MODE reset is also added.
    
    4. Return -EINVAL in tg3_nway_reset() if device is in TBI mode. Allow
       nway_reset if 5780S is in parallel detect mode.
    
    5. Add missing PHY IDs in KNOWN_PHY_ID() macro.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit c58ec93245a1fb7354f9e331960380827b9f41db
Author: Michael Chan <mchan@broadcom.com>
Date:   Sat Sep 17 00:46:27 2005 -0700

    [TG3]: Fix 4GB boundary tx handling
    
    Fix and simplify the workaround code for the 4GB boundary tx buffer
    hardware bug.
    
    1. Need to unmap the original SKB's dma addresses if a new SKB cannot
       be allocated.
    
    2. Need to pass the base flag to tigon3_4gb_hwbug_workaround() or TSO
       won't work properly.
    
    3. The guilty entry and length parameters for
       tigon3_4gb_hwbug_workaround() are removed as they are not necessary.
    
    4. Remove assumption that only one fragment can hit the 4GB boundary.
       Another fragment can hit 8GB for example.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 22abe310bc4b0c684fd3716af6b6116ff1011707
Author: Peter Hagervall <hager@cs.umu.se>
Date:   Fri Sep 16 17:01:03 2005 -0700

    [TG3]: Sparse fixes for tg3
    
    Change 0 to NULL where appropriate.
    
    Signed-off-by: Peter Hagervall <hager@cs.umu.se>
    Acked-by: Jeff Garzik <jgarzik@pobox.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 1cbf07478bbf3e350a2025bc5ea23fedaa95855a
Author: David S. Miller <davem@davemloft.net>
Date:   Fri Sep 16 16:59:20 2005 -0700

    [TG3]: Add AMD K8 to list of write-reorder chipsets.
    
    Thanks to Andy Stewart for the report and testing
    debug patches from Michael Chan.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 2ff436977ed3eeca2d39ae40bbfdb1ce58da8453
Author: John W. Linville <linville@tuxdriver.com>
Date:   Mon Sep 12 14:44:20 2005 -0700

    [TG3]: Add support for ETHTOOL_GPERMADDR.
    
    Signed-off-by: John W. Linville <linville@tuxdriver.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 4f63b877726135b19ae73108acf9e0ebb4323dda
Author: John W. Linville <linville@tuxdriver.com>
Date:   Mon Sep 12 14:43:18 2005 -0700

    [TG3]: Do not count non-error frames dropped by the hardware as rx_errors.
    
    Instead, count them as part of rx_missed_errors.
    
    Signed-off-by: John W. Linville <linville@tuxdriver.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 74da1edf264c5982b465041a5706caff25d7e1ed
Author: David S. Miller <davem@sunset.davemloft.net>
Date:   Mon Sep 5 17:56:11 2005 -0700

    [TG3]: Update driver version and release date.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 38f3843ed6bdbcff9465386c3539523466880320
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Sep 5 17:53:32 2005 -0700

    [TG3]: Use status tag to check for new events
    
    Use the status tag to determine if there are new events in
    tg3_interrupt_tagged(). We discussed about this a while ago with Grant
    Grundler and DaveM. This scheme makes it unnecessary to clear the
    updated bit in the status block when using tagged mode, and only
    a simple comparison is needed to determine if there are new events.
    
    The tp->lock around netif_rx_complete() and tg3_restart_ints() is also
    removed. It is unnecessary with DaveM's new locking scheme.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 61487480dd79acc5e82b08cd29cbcbd3301645fa
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Sep 5 17:53:19 2005 -0700

    [TG3]: Remove status block access in tg3_msi() and add prefetches
    
    Remove unnecessary status block accesses in tg3_msi(). Since MSI is
    not shared, it is unnecessary to read the status block to determine if
    there are any new events in the MSI handler. It is also unnecessary to
    clear the updated bit in the status block.
    
    Since the poll list is per-cpu, tg3_poll() will be scheduled to run on
    the same CPU that received the MSI. Prefetches for the status block
    and the next rx descriptors are added in tg3_msi() to improve their
    access times when tg3_poll() runs.
    
    In the non-MSI irq handlers, we need to check the status block because
    interrupts may be shared. Only prefetches for the next rx descriptors
    are added.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 9f40dead25957434937f2b1872e9f4b43605f0ad
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Sep 5 17:53:06 2005 -0700

    [TG3]: Add PHY loopback test
    
    Improve ethtool loopback self test by adding PHY loopback to the
    existing MAC loopback test.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 4009a93d8e85f685b02794aee28e3272be862e2b
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Sep 5 17:52:54 2005 -0700

    [TG3]: Add ethtool -p support
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>
    

commit 4c98748763ce25c5394a7edd686d92c70b4fac38
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Sep 5 17:52:38 2005 -0700

    [TG3]: Minor 5780 and 5752 fixes
    
    Minor SerDes bug fixes for 5780S and nvram bug fixes for 5780 and
    5752.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 75c80c382fbd08acf06fbef9d54c9844e806a8b4
Author: David S. Miller <davem@davemloft.net>
Date:   Thu Sep 1 17:42:23 2005 -0700

    [TG3]: Update driver version and release date.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 51b9146869ab9492da785c5c9321d85f01655ab6
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu Sep 1 17:41:28 2005 -0700

    [TG3]: Minimize locking in TX path.
    
    This is similar to Eric Dumazet's tx_lock patch for tg3 but takes it
    one step further to eliminate the tx_lock in the tx_completion path
    when the tx queue is not stopped.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 087fe256f0aef8d16b19a30c6fb10b899bf1a701
Author: Michael Chan <mchan@broadcom.com>
Date:   Tue Aug 9 20:17:41 2005 -0700

    [TG3]: Fix bug in setting a tg3_flag
    
    Found a bug while reviewing the patches the second time.
    
    The TG3_FLAG_TXD_MBOX_HWBUG flag is set after the register access
    methods have been determined. This patch fixes it by moving it up before
    the various access methods are assigned.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 15f5a585c6b8dac31ed0a55693aacf51934f0f5d
Author: Michael Chan <mchan@broadcom.com>
Date:   Tue Aug 9 20:17:28 2005 -0700

    [TG3]: Eliminate one register write in tg3_restart_ints()
    
    The register write to register 0x68 to restart interrupts is unnecessary
    as the interrupt wasn't masked in that register by the irq handler. This
    will save one register write in the fast path.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 6892914fb7980d844f2bac859f4095df9ebd18da
Author: Michael Chan <mchan@broadcom.com>
Date:   Tue Aug 9 20:17:14 2005 -0700

    [TG3]: Add indirect register method for 5703 behind ICH
    
    This patch adds the new workaround for 5703 A1/A2 if it is behind
    certain ICH bridges. The workaround disables memory and uses config.
    cycles only to access all registers. The 5702/03 chips can mistakenly
    decode the special cycles from the ICH chipsets as memory write cycles,
    causing corruption of register and memory space. Only certain ICH
    bridges will drive special cycles with non-zero data during the address
    phase which can fall within the 5703's address range. This is not an ICH
    bug as the PCI spec allows non-zero address during special cycles.
    However, only these ICH bridges are known to drive non-zero addresses
    during special cycles.
    
    The indirect_lock is also changed to spin_lock_irqsave from spin_lock_bh
    because it is used in irq handler when using the indirect method to
    disable interrupts.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 09ee929cccfd0b56ea3724b3c6299fbbe813df43
Author: Michael Chan <mchan@broadcom.com>
Date:   Tue Aug 9 20:17:00 2005 -0700

    [TG3]: Add mailbox read method
    
    This patch adds the mailbox read method and also adds an inline function
    tw32_mailbox_f() for mailbox writes that require read flush.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 1ee582d8e49a1c9dd43b2599f1cd26507182a8d4
Author: Michael Chan <mchan@broadcom.com>
Date:   Tue Aug 9 20:16:46 2005 -0700

    [TG3]: Add various register methods
    
    This patch adds various dedicated register read/write methods for the
    existing workarounds, including PCIX target workaround, write with read
    flush, etc. The chips that require these workarounds will use these
    dedicated access functions.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 2009493065e01b1fe27c1b98ffbcfab98e185f72
Author: Michael Chan <mchan@broadcom.com>
Date:   Tue Aug 9 20:16:32 2005 -0700

    [TG3]: Add basic register access function pointers
    
    This patch adds the basic function pointers to do register accesses in
    the fast path. This was suggested by David Miller. The idea is that
    various register access methods for different hardware errata can easily
    be implemented with these function pointers and performance will not be
    degraded on chips that use normal register access methods.
    
    The various register read write macros (e.g. tw32, tr32, tw32_mailbox)
    are redefined to call the function pointers.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit d4ef16088913002255eab9958fff4e98b3b507d6
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu Aug 25 15:31:41 2005 -0700

    [TG3]: Fix ethtool loopback test lockup
    
    The tg3_abort_hw() call in tg3_test_loopback() is causing lockups on
    some devices. tg3_abort_hw() disables the memory arbiter, causing
    tg3_reset_hw() to hang when it tries to write the pre-reset signature.
    tg3_abort_hw() should only be called after the pre-reset signature has
    been written. This is all done in tg3_reset_hw() so the tg3_abort_hw()
    call is unnecessary and can be removed.
    
    [ Also bump driver version and release date. -DaveM ]
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 034ea6388a51f571b45ef1f0fa4ed4298691768e
Author: David S. Miller <davem@davemloft.net>
Date:   Fri Aug 19 12:57:31 2005 -0700

    [TG3]: Update driver version and reldate.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit da6b2d01d6bd2e79fd4f7a08acd37dc4e8fcdce8
Author: Michael Chan <mchan@broadcom.com>
Date:   Fri Aug 19 12:54:29 2005 -0700

    [TG3]: Fix SerDes detection
    
    A problem was reported by Grant Grundler on an HP rx8620 using IOX
    Core LAN partno(A7109-6) 5701 copper NIC. The tg3 driver mistakenly
    detects this NIC as having a SerDes PHY and link does not come up as a
    result.
    
    The problem was caused by an incorrectly programmed eeprom that set the
    NIC_SRAM_DATA_CFG_PHY_TYPE_FIBER bit in the NIC_SRAM_DATA_CFG location.
    
    This patch will override the NIC_SRAM_DATA_CFG_PHY_TYPE_FIBER bit if a
    valid PHY ID is read from the MII registers on older 570x chips where
    the MII interface is not used on SerDes chips. On newer chips such as
    the 5780 that use MII for both copper and SerDes, SerDes detection must
    rely on the eeprom.
    
    This patch will make the SerDes detection identical to versions 3.25 and
    older.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Acked-by: Grant Grundler <iod00d@hp.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 7d3f4c97723c4ec4e5d85e6e70084b02e6be8788
Author: David S. Miller <davem@davemloft.net>
Date:   Sat Aug 6 06:35:48 2005 -0700

    [TG3]: Save initial PCI state before registering the netdevice.
    
    Else on SMP systems it is possible for hotplug to execute,
    invoke tg3_open(), and end up loading the uninitialized
    PCI register save area into the card.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit fc87670b6cd63abc6fc4e3a115741984750d1fbc
Author: David S. Miller <davem@davemloft.net>
Date:   Mon Jul 25 12:45:32 2005 -0700

    [TG3]: Update driver version and reldate.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 747e8f8bff56955374521fa4d488e702d4b0c04f
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Jul 25 12:33:22 2005 -0700

    [TG3]: add 5780 fiber support
    
    Add 5780S support by adding a new tg3_setup_fiber_mii_phy() function and
    a timer function for parallel link detection. 5780S uses standard MII
    registers for 1000BaseX and runs in GMII mode as opposed to TBI mode on
    older serdes chips.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit ef7f5ec0deb2bcdc005f30f6f75f79c65c577cf5
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Jul 25 12:32:25 2005 -0700

    [TG3]: disallow jumbo TSO on 5780
    
    Disallow jumbo TSO on 5780 due to hardware restrictions.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit fdfec1726b14b4b2121adcfcbba98d4cc1a61751
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Jul 25 12:31:48 2005 -0700

    [TG3]: consolidate all DMA water mark settings
    
    Consolidate all DMA watermark settings for standard and jumbo frames on
    all chips in tg3_init_bufmgr_config() and add new settings for 5780.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 7e72aad48c3790636bfa006f3b0027852ccad47e
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Jul 25 12:31:17 2005 -0700

    [TG3]: add variable buffer size for standard ring
    
    Add a new rx_pkt_buf_sz to the tg3 structure to support variable buffer
    sizes on the standard ring.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 0f893dc6ec890058d926224c8aa254d8621e0ea3
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Jul 25 12:30:38 2005 -0700

    [TG3]: add 5780 basic jumbo frame support
    
    Add basic jumbo frames support for 5780. This chip supports jumbo frames
    on the standard receive ring without the jumbo ring. The
    TG3_FLAG_JUMBO_ENABLE is changed to TG3_FLAG_JUMBO_RING_ENABLE to
    indicate using the jumbo ring on 5704 and older chips. A new
    TG3_FLG2_JUMBO_CAPABLE flag is added to indicate jumbo frames support
    with or without the jumbo ring.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 4cf78e4fb678807e3f8265c9e9031a84f5c601f0
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Jul 25 12:29:19 2005 -0700

    [TG3]: add 5780 basic support
    
    Add 5780 PCI IDs, chip IDs, and other basic support.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 93e266f600f4048fe7a2e8803abb9f8baff84aa7
Author: David S. Miller <davem@davemloft.net>
Date:   Tue Jul 5 14:43:19 2005 -0700

    [TG3]: Update driver version and reldate.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit d244c892c8e23d6baba88af88f78f7201a224d39
Author: Michael Chan <mchan@broadcom.com>
Date:   Tue Jul 5 14:42:33 2005 -0700

    [TG3]: support for ethtool -C
    
    Add support for ethtool -C with verification of user parameters.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 5f70eaa0d5768775a7492f3e3841fcca94bb0d13
Author: David S. Miller <davem@davemloft.net>
Date:   Fri Jun 24 20:21:01 2005 -0700

    [TG3]: Update driver version and reldate.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit bbe832c09233738c100145fd535b6b8fc97640f6
Author: Michael Chan <mchan@broadcom.com>
Date:   Fri Jun 24 20:20:04 2005 -0700

    [TG3]: Refinements to new locking strategy.
    
    1. Move tp->irq_sync = 0 to before the interrupt mailbox IO in
       tg3_enable_ints() so that the interrupt handler will always see
       irq_sync == 0 when interrupts are enabled.
    
    2. Remove the tg3_enable_ints() call in tg3_reset_hw(). Interrupts are
       always enabled explicitly or through tg3_netif_start(). This is to
       prevent interrupts being enabled while poll is disabled.
    
    3. Update trans_start with jiffies in tg3_netif_stop() to prevent false
       NETDEV WATCHDOG.
    
    4. Pass in the proper irq_sync parameter to tg3_full_lock() depending on
       netif_running() in some of the ethtool set calls.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit f47c11eeccc8820010992eb32dbe7370a08f8bd3
Author: David S. Miller <davem@davemloft.net>
Date:   Fri Jun 24 20:18:35 2005 -0700

    [TG3]: Eliminate all hw IRQ handler spinlocks.
    
    Move all driver spinlocks to be taken at sw IRQ
    context only.
    
    This fixes the skb_copy() we were doing with hw
    IRQs disabled (which is illegal and triggers a
    BUG() with HIGHMEM enabled).  It also simplifies
    the locking all over the driver tremendously.
    
    We accomplish this feat by creating a special
    sequence to synchronize with the hw IRQ handler
    using a binary state and synchronize_irq().
    This idea is from Herbert Xu.
    
    Thanks to Michael Chan for helping to track down
    all of the race conditions in initial versions
    of this code.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit cd024c8baf9756759c57f0a19be639da8d3d4f8c
Author: David S. Miller <davem@davemloft.net>
Date:   Fri Jun 24 20:17:10 2005 -0700

    [TG3]: Fix missing memory barriers and SD_STATUS_UPDATED bit clearing.
    
    There must be a rmb() between reading the status block tag
    and calling tg3_has_work().  This was missing in tg3_mis()
    and tg3_interrupt_tagged().  tg3_poll() got it right.
    
    Also, SD_STATUS_UPDATED must be cleared in the status block
    right before we call tg3_has_work().  Only tg3_poll() got this
    wrong.
    
    Based upon patches and commentary from Grant Grundler and
    Michael Chan.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit ed7fce6c13bdd802817e1988d67047d432e7e30b
Author: David S. Miller <davem@davemloft.net>
Date:   Wed Jun 8 14:15:52 2005 -0700

    [TG3]: Update driver version and release date.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 6d1cfbab4de64f2d0c5b0f81177ade0d75b69288
Author: Michael Chan <mchan@broadcom.com>
Date:   Wed Jun 8 14:13:14 2005 -0700

    [TG3]: Fix 5700/5701 DMA corruption on Apple G4.
    
    Fix 5700/5701 DMA write corruption on Apple G4 by detecting the Apple
    UniNorth PCI 1.5 chipset and adjusting the DMA write boundary to 16. DMA
    test fails to detect the problem with this chipset.
    
    Thanks to Manuel Perez Ayala for reporting the problem and helping to
    debug it.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 15def7bfb6902aa2b2bc67059f26d696fb27c235
Author: David S. Miller <davem@davemloft.net>
Date:   Mon Jun 6 15:22:56 2005 -0700

    [TG3]: Update driver version and release date.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 9ba27794197a18168b99ccecfb7b799f18b64426
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Jun 6 15:16:20 2005 -0700

    [TG3] Fix link failure in 5701
    
    On some 5701 devices with older bootcode, the LED configuration bits in
    SRAM may be invalid with value zero. The fix is to check for invalid
    bits (0) and default to PHY 1 mode. Incorrect LED mode will lead to
    error in programming the PHY.
    
    Thanks to Grant Grundler for debugging the problem.
    
    >From Grant:
    | In May, 2004,  tg3 v3.4 changed how MAC_LED_CTRL (0x40c) was getting
    | programmed and how to determine what to program into LED_CTRL. The new
    | code trusted NIC_SRAM_DATA_CFG (0x00000b58) to indicate what to write
    | to LED_CTRL and MII EXT_CTRL registers. On "IOX Core Lan", SRAM was
    | saying MODE_MAC (0x0) and that doesn't work.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 49cabf49abd7676d026a61baabf5aae9337a82be
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Jun 6 15:15:17 2005 -0700

    [TG3]: Add TSO firmware license
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 9beb1d587f690d5b2f9087f8f10c0ff9f6b66886
Author: John W. Linville <linville@tuxdriver.com>
Date:   Mon Jun 6 15:14:35 2005 -0700

    [TG3]: Update pci.ids for BCM5752
    
    Signed-off-by: John W. Linville <linville@tuxdriver.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 1b62815193f6c20c60958e5347751155833e3d35
Author: Michael Chan <mchan@broadcom.com>
Date:   Sun May 29 14:59:49 2005 -0700

    [TG3]: Fix bug in tg3_load_firmware_cpu
    
    Add tg3_nvram_lock() and tg3_nvram_unlock() calls around tg3_halt_cpu().
    It is possible that the bootcode may be loading code from nvram during
    this call and stopping the cpu without getting the lock may cause
    uncompleted nvram data to be left in the nvram data register. Subsequent
    calls to read/write nvram data will fail.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit d4bc3927d284784b3f0bff05b4eed2242cc3e226
Author: Michael Chan <mchan@broadcom.com>
Date:   Sun May 29 14:59:20 2005 -0700

    [TG3]: Add interrupt test
    
    This test uses the previously added tg3_test_interrupt() to perform the
    test.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit c76949a6826fc11efcd6bb1abdca1ae02761071d
Author: Michael Chan <mchan@broadcom.com>
Date:   Sun May 29 14:58:59 2005 -0700

    [TG3]: Add loopback test
    
    The test will loopback one packet in MAC loopback mode and verify the
    packet data.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 7942e1dbd7252b480ed238096dca617189d293df
Author: Michael Chan <mchan@broadcom.com>
Date:   Sun May 29 14:58:36 2005 -0700

    [TG3]: Add memory test
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit a71116d1f3b85a69fe3a3acec9223fefb4b1fc66
Author: Michael Chan <mchan@broadcom.com>
Date:   Sun May 29 14:58:11 2005 -0700

    [TG3]: Add register test
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 944d980ecaabe44616a9e2d50101ce774f517bb6
Author: Michael Chan <mchan@broadcom.com>
Date:   Sun May 29 14:57:48 2005 -0700

    [TG3]: Add parameter to tg3_halt
    
    Add a reset kind parameter to tg3_halt() so that the RESET_KIND_SUSPEND
    parameter can be passed to tg3_halt() before doing offline tests.
    
    All other calls to tg3_halt() will use the RESET_KIND_SHUTDOWN
    parameter.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit ca43007a92662621e5819912fc31c346e3a2eed8
Author: Michael Chan <mchan@broadcom.com>
Date:   Sun May 29 14:57:23 2005 -0700

    [TG3]: Add link test
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 566f86adb336637d03900f53b886d879aa5f5d56
Author: Michael Chan <mchan@broadcom.com>
Date:   Sun May 29 14:56:58 2005 -0700

    [TG3]: Add nvram test
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 4cafd3f533475c976879d85773735c004f09f576
Author: Michael Chan <mchan@broadcom.com>
Date:   Sun May 29 14:56:34 2005 -0700

    [TG3]: Add basic selftest infrastructure
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit d1faeaeb95a05275cf0c5b51b88f2fa833434625
Author: David S. Miller <davem@davemloft.net>
Date:   Mon May 23 14:00:44 2005 -0700

    [TG3]: Update driver version.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit ded7340d9d9142807a1ef94ab9c51d13ab76a1c9
Author: David S. Miller <davem@davemloft.net>
Date:   Mon May 23 13:59:47 2005 -0700

    [TG3]: Increase TEST_BUFFER_SIZE to 8K.
    
    This makes the DMA bug workaround test more likely
    to find the problem on some systems.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 413f5431a5a27e44c6610de640e507e1e3c885f4
Author: David S. Miller <davem@davemloft.net>
Date:   Mon May 23 13:13:15 2005 -0700

    [TG3]: Update driver version and reldate.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit d8659255c599ba497bcfb8b4abc187d9e0951d99
Author: Xose Vazquez Perez <xose.vazquez@gmail.com>
Date:   Mon May 23 12:54:51 2005 -0700

    [TG3]: Add 5752M device ID.
    
    Add 0x1601 as 5752M, it's a 5752 but for mobile PCs.
    Stolen from Broadcom bcm5700-8.1.55 driver.
    
    Someone forgot to add it to tg3 ;-)
    
    Signed-off-by: David S. Miller <davem@davemloft.net>
    
commit f7383c22246cfccbe912541dd83103009ed2b537
Author: David S. Miller <davem@davemloft.net>
Date:   Wed May 18 22:50:53 2005 -0700

    [TG3]: In tg3_poll(), resample status_tag after doing work.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 59e6b4343299373bc10dd131ab5142f53ddd838a
Author: David S. Miller <davem@davemloft.net>
Date:   Wed May 18 22:50:10 2005 -0700

    [TG3]: Refine DMA boundary setting.
    
    Extract DMA boundary bit selection into a seperate
    function, tg3_calc_dma_bndry().  Call this from
    tg3_test_dma().
    
    Make DMA test more reliable by using no DMA boundry
    setting during the test.  If the test passes, then
    use the setting we selected before the test.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>
    Signed-off-by: Michael Chan <mchan@broadcom.com>

commit 15f9850d3c2d46f5851a424d2990a18b5bb5ebfd
Author: David S. Miller <davem@davemloft.net>
Date:   Wed May 18 22:49:26 2005 -0700

    [TG3]: Set minimal hw interrupt mitigation.
    
    Even though we do software interrupt mitigation
    via NAPI, it still helps to have some minimal
    hw assisted mitigation.
    
    This helps, particularly, on systems where register
    I/O overhead is much greater than the CPU horsepower.
    
    For example, it helps on NUMA systems.  In such cases
    the PIO overhead to disable interrupts for NAPI accounts
    for the majority of the packet processing cost.  The
    CPU is fast enough such that only a single packet is
    processed by each NAPI poll call.
    
    Thanks to Michael Chan for reviewing this patch.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit fac9b83ea79aa3112ed245d9a4fc2a5c3ec2b7ec
Author: David S. Miller <davem@davemloft.net>
Date:   Wed May 18 22:46:34 2005 -0700

    [TG3]: Add tagged status support.
    
    When supported, use the TAGGED interrupt processing support
    the chip provides.  In this mode, instead of a "on/off" binary
    semaphore, an incrementing tag scheme is used to ACK interrupts.
    
    All MSI supporting chips support TAGGED mode, so the tg3_msi()
    interrupt handler uses it unconditionally.  This invariant is
    verified when MSI support is tested.
    
    Since we can invoke tg3_poll() multiple times per interrupt under
    high packet load, we fetch a new copy of the tag value in the
    status block right before we actually do the work.
    
    Also, because the tagged status tells the chip exactly which
    work we have processed, we can make two optimizations:
    
    1) tg3_restart_ints() need not check tg3_has_work()
    2) the tg3_timer() need not poke the chip 10 times per
       second to keep from losing interrupt events
    
    Based upon valuable feedback from Michael Chan <mchan@broadcom.com>
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit b6d31e80f0d6a722bf85b3a7090df473fc545980
Author: David S. Miller <davem@davemloft.net>
Date:   Thu May 5 14:46:21 2005 -0700

    [TG3]: Update driver version and reldate.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit e6de8ad1fae8385eca4bf288e7a6ea2664ce0458
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu May 5 14:42:41 2005 -0700

    [TG3]: Ignore tg3_stop_block() errors.
    
    tg3_stop_block() errors can be safely ignored since tg3_chip_reset()
    always follows tg3_stop_block() calls.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit b3b7d6be54f919556148946adb4ece91820ad210
Author: David S. Miller <davem@davemloft.net>
Date:   Thu May 5 14:40:20 2005 -0700

    [TG3]: Elide tg3_stop_block messages when such events are normal.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit f4d0ee983ec01e59a77e157ab702246f397b2a2b
Author: David S. Miller <davem@sunset.davemloft.net>
Date:   Thu Apr 28 11:33:20 2005 -0700

    [TG3]: Set SA_SAMPLE_RANDOM in request_irq() calls.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 04237dddd14375fce1df4bfb1be92a35aa1c247f
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Apr 25 15:17:17 2005 -0700

    [TG3]: Fix tg3_restart_ints()
    
    tg3_restart_ints() is called to re-enable interrupts after tg3_poll()
    has finished all the work. It calls tg3_cond_int() to force an interrupt
    if the status block updated bit is set. The updated bit will be set if
    there is a new status block update sometime during tg3_poll() and it can
    be very often. The worst part is that even if all the work has been
    processed, the updated bit remains set and an interrupt will be forced
    unnecessarily.
    
    The fix is to call tg3_has_work() instead to determine if new work is
    posted before forcing an interrupt. The way to force an interrupt is
    also changed to use "coalesce_now" instead of "SETINT". The former is
    generally a safer way to force the interrupt.
    
    Also deleted the first parameter to tg3_has_work() which is unused.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 52f6d697dc0f2c039e8413e780b0f45ddf8161fc
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Apr 25 15:14:32 2005 -0700

    [TG3]: Refresh hw index in tg3_rx()
    
    This patch refreshes the hw rx producer in tg3_rx() so that additional
    work posted by the hardware can be processed.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 483ba50bd41d14d5325d6cd9935de86a982d08a2
Author: Michael Chan <mchan@broadcom.com>
Date:   Mon Apr 25 15:14:03 2005 -0700

    [TG3]: Fix bug in tg3_rx()
    
    This patch fixes a bug that causes tg3_has_work() to always return 1.
    
    rx work is determined by comparing tp->rx_rcb_ptr with the current hw
    producer index. The hw producer index is modulo the ring size, but tp-
    >rx_rcb_ptr is a free running counter that goes up beyond the ring size.
    After the ring wraps around once, tg3_has_work() will always return 1.
    
    The fix is to always do modulo arithmetic on tp->rx_rcb_ptr.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit ac6910e189471e6b46ecea59e7620b083329ad4f
Author: David S. Miller <davem@davemloft.net>
Date:   Sun Apr 24 20:06:16 2005 -0700

    [TG3]: Update driver version and release date.
    
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 7938109fff944e0117976a39946d99d2b0b0250d
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu Apr 21 17:13:59 2005 -0700

    [TG3]: Add msi test
    
    Add MSI test for chips that support MSI. If MSI test fails, it will
    switch back to INTx mode and will print a message asking the user to
    report the failure.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 88b06bc26b87cf0490b0e3faea7fefc7549dd75d
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu Apr 21 17:13:25 2005 -0700

    [TG3]: Add msi support
    
    Add MSI support for 5751 C0 and 5752.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 1c8594b48b00a98d12477355e944e165a5f64cd5
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu Apr 21 17:12:46 2005 -0700

    [TG3]: Fix bug in tg3_set_eeprom()
    
    Fix a bug in tg3_set_eeprom() when the length is less than 4 and the
    offset is not 4-byte aligned.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit e6af301be3c129adbc8a7c8ffb76e62533ad9575
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu Apr 21 17:12:05 2005 -0700

    [TG3]: Add nvram lock-out support for 5752 TPM
    
    Add support for the NVRAM lock-out feature for TPM in 5752. If lock-out
    is enabled, certain NVRAM registers cannot be written to.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 361b4ac29bc651c7612d4bf21434ae6fe06b78e4
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu Apr 21 17:11:21 2005 -0700

    [TG3]: Add nvram detection for 5752
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 3e7d83bc96d59013792e5546e7832668d3adbce7
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu Apr 21 17:10:36 2005 -0700

    [TG3]: Add GPIO3 for 5752
    
    Add bit definitions for the new GPIO3 in 5752. GPIO3 must be driven as
    output when it is unused.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit ff645bec523819fa4d28d7e0de7d998e3edb0c57
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu Apr 21 17:09:53 2005 -0700

    [TG3]: Workaround 5752 A0 chip ID
    
    The 5752 A0 chip ID is wrong in hardware. The simplest way to workaround
    it is to change it to the correct value in tp->pci_chip_rev_id. This
    way, it is easier to check for the ASIC_REV_5752 in the rest of the
    driver.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 8c6bda1a89c148f3a28edc09a76dac9bff57d8ee
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu Apr 21 17:09:08 2005 -0700

    [TG3]: Fix tg3_set_power_state()
    
    Fix tg3_set_power_state to drive GPIOs properly based on the
    TG3_FLAG_EEPROM_WRITE_PROTECT flag. Some delays are also added after D0
    and D3 power state changes.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 314fba348e1f64a30b53d3cff5d96872424e8498
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu Apr 21 17:07:04 2005 -0700

    [TG3]: Setup proper GPIO settings
    
    Setup proper GPIO settings in tp->grc_local_ctrl before calling
    tg3_set_power() state in tg3_get_invariants() and after chip reset.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 7d0c41ef89dad9008edf1c3c0022721ebad39999
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu Apr 21 17:06:20 2005 -0700

    [TG3]: Split tg3_phy_probe into 2 functions
    
    Split the 1st half of tg3_phy_probe() into tg3_get_eeprom_hw_cfg() so
    that the TG3_FLAG_EEPROM_WRITE_PROT can be determined before calling
    tg3_set_power_state() in tg3_get_invariants(). This will allow
    tg3_set_power_state() to drive the GPIOs correctly based on the config.
    information in eeprom.
    
    On the 5752, there are no pull-up resistors on the GPIO pins and it is
    necessary to drive the unused GPIOs as output.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 85e94cedc44d1c2c1663b5b18f703ca5e7316e59
Author: Michael Chan <mchan@broadcom.com>
Date:   Thu Apr 21 17:05:28 2005 -0700

    [TG3]: Minor 5752 fixes
    
    Some minor 5752 fixes mostly for correctness and add 5752 PHY ID.
    
    Signed-off-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 053d78000be4906fac6446ad517ca3897dc6cd84
Author: John W. Linville <linville@tuxdriver.com>
Date:   Thu Apr 21 17:03:52 2005 -0700

    [TG3]: add support for bcm5752 rev a1
    
    Replace existing ASIC_REV_5752 definition with ASIC_REV_5752_A0,
    and add definition for ASIC_REV_5752_A1. Then, add ASIC_REV_5752_A1
    to check for setting TG3_FLG2_5750_PLUS in tg3_get_invariants.
    
    Signed-off-by: John W. Linville <linville@tuxdriver.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 1b440c568e28186956ef765c69ab124401088663
Author: John W. Linville <linville@tuxdriver.com>
Date:   Thu Apr 21 17:03:18 2005 -0700

    [TG3]: check TG3_FLG2_5750_PLUS flag to set TG3_FLG2_5705_PLUS flag
    
    Use check of TG3_FLG2_5750_PLUS in tg3_get_invariants to set
    TG3_FLG2_5705_PLUS flag.
    
    Signed-off-by: John W. Linville <linville@tuxdriver.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit bb7064dc09ff90015ddc7d818dd8fefb8ca5b936
Author: John W. Linville <linville@tuxdriver.com>
Date:   Thu Apr 21 17:02:41 2005 -0700

    [TG3]: use TG3_FLG2_57{05,50}_PLUS flags in tg3_get_invariants
    
    Rewrite checks in tg3_get_invariants to use TG3_FLG2_5705_PLUS and
    TG3_FLG2_5750_PLUS flags.
    
    Signed-off-by: John W. Linville <linville@tuxdriver.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 863925f59e5425e4af6996b9c50857c766940176
Author: John W. Linville <linville@tuxdriver.com>
Date:   Thu Apr 21 17:02:04 2005 -0700

    [TG3]: more use of TG3_FLG2_5705_PLUS flag
    
    Rewrite of a couple of troublesome multi-way if statements to use
    TG3_FLG2_5705_PLUS flag.
    
    Signed-off-by: John W. Linville <linville@tuxdriver.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit cbf46853c8db75f98bd005dc545aca0703063d4b
Author: John W. Linville <linville@tuxdriver.com>
Date:   Thu Apr 21 17:01:29 2005 -0700

    [TG3]: use new TG3_FLG2_5750_PLUS flag
    
    Replace a number of two-way if statements checking for 5750, and/or
    5752 to reference the newly-defined TG3_FLG2_5750_PLUS flag instead.
    
    Signed-off-by: John W. Linville <linville@tuxdriver.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 6708e5cc103ba045fca035b4d8df236ca31fb8bc
Author: John W. Linville <linville@tuxdriver.com>
Date:   Thu Apr 21 17:00:52 2005 -0700

    [TG3]: define TG3_FLG2_5750_PLUS flag
    
    Define TG3_FLG2_5750_PLUS flag and set it in tg3_get_invariants for
    ASIC_REV_5750 or ASIC_REV_5752.
    
    Signed-off-by: John W. Linville <linville@tuxdriver.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit fcf026936c613fc6ca4685677a461100d87eec81
Author: John W. Linville <linville@tuxdriver.com>
Date:   Thu Apr 21 17:00:02 2005 -0700

    [TG3]: use TG3_FLG2_5705_PLUS instead of multi-way if's
    
    Replace a number of three-way if statements checking for 5705, 5750,
    and 5752 to reference the equivalent TG3_FLG2_5705_PLUS flag instead.
    
    Signed-off-by: John W. Linville <linville@tuxdriver.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 6e9017a7d9b949aea638eeba67d34affaa145f14
Author: John W. Linville <linville@tuxdriver.com>
Date:   Thu Apr 21 16:58:56 2005 -0700

    [TG3]: add bcm5752 entry to pci_ids.h
    
    Add proper entry for bcm5752 PCI ID to pci_ids.h, and use it in tg3.
    I did this separately in case patches like this (i.e. new PCI IDs)
    need to come from more "official" sources.
    
    Signed-off-by: John W. Linville <linville@tuxdriver.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit af2bcd97b570f39da94103f80f67433dab515049
Author: John W. Linville <linville@tuxdriver.com>
Date:   Thu Apr 21 16:57:50 2005 -0700

    [TG3]: add bcm5752 to tg3_pci_tbl
    
    Add hard-coded definition of bcm5752 PCI ID to tg3_pci_tbl.
    Next patch will change entry to use pci_ids.h-based definition.
    
    Signed-off-by: John W. Linville <linville@tuxdriver.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

commit 2052da946096590035438626afbc7f329d2549d8
Author: John W. Linville <linville@tuxdriver.com>
Date:   Thu Apr 21 16:56:08 2005 -0700

    [TG3]: add basic bcm5752 support
    
    Add ASIC_REV_5752 definition.
    
    Track-down all references to ASIC_REV_5750 and mirror them with
    references to the newly defined ASIC_REV_5752.
    
    Signed-off-by: John W. Linville <linville@tuxdriver.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>

<davem@nuts.davemloft.net>
	[TG3]: Update driver version and reldate.
	
	Signed-off-by: David S. Miller <davem@davemloft.net>

<davem@nuts.davemloft.net>
	[TG3]: Always check tg3_readphy() return value.
	
	Signed-off-by: David S. Miller <davem@davemloft.net>

<davem@nuts.davemloft.net>
	[TG3]: Update driver version and reldate.
	
	Signed-off-by: David S. Miller <davem@davemloft.net>

<mchan@broadcom.com>
	[TG3]: capacitive coupling detection fix
	
	This patch fixes the problem reported in:
	
	http://marc.theaimsgroup.com/?l=linux-kernel&m=110798711911645&w=2
	
	
	The 5700 link problem was caused by reading uninitialized values in sram and
	causing capacitive coupling mode to be enabled by mistake. This patch fixes
	the problem by properly validating the sram contents.
	
	
	Signed-off-by: Michael Chan <mchan@broadcom.com>
	Signed-off-by: David S. Miller <davem@davemloft.net>

<davem@nuts.davemloft.net>
	[TG3]: Update driver version and reldate.
	
	Signed-off-by: David S. Miller <davem@davemloft.net>

<grundler@parisc-linux.org>
	[TG3]: Clean up grc_local_ctrl usage.
	
	Make the code more readable by only flipping the specific
	bits that need to change each register write.
	
	Signed-off-by: Grant Grundler (grundler@parisc-linux.org)
	Signed-off-by: David S. Miller <davem@davemloft.net>

<davem@nuts.davemloft.net>
	[TG3]: Update driver version and reldate.
	
	Signed-off-by: David S. Miller <davem@davemloft.net>

<mchan@broadcom.com>
	[TG3]: 5704 serdes fixes
	
	- Fix capacitive coupling detection by reading the correct offset in sram
	- Add support for different signal pre-emphasis on 5704S (used in some blade
	servers)
	- Improve 5704S link parallel detection. When autonegotiation fails, we only
	detect link-up if we have PCS_SYNC and we are not receiving config code
	words. This will prevent false link-up when only the rx cable is attached.
	
	
	Signed-off-by: Michael Chan <mchan@broadcom.com>
	Signed-off-by: David S. Miller <davem@davemloft.net>

<davem@nuts.davemloft.net>
	[TG3]: Update driver version and reldate.
	
	Signed-off-by: David S. Miller <davem@davemloft.net>

<mchan@broadcom.com>
	[TG3]: 5750 fixes
	
	Some misc. fixes for 5750. The first 2 fixes below are for correctness.
	
	- Do not set extended MAC addresses for 5750
	- Do not set NIC ring addresses in send ring and receive return ring
	  RCBs for 5750
	- Check eeprom write protect bit for 5750
	
	Signed-off-by: Michael Chan <mchan@broadcom.com>
	Signed-off-by: David S. Miller <davem@davemloft.net>

<davem@nuts.davemloft.net>
	[TG3]: Update driver version and reldate.
	
	Signed-off-by: David S. Miller <davem@davemloft.net>

<mchan@broadcom.com>
	[TG3]: Fix TSO for 5750
	
	- Fix TSO for 5750 chips by setting tcp checksum field to 0 for TSO packets
	- Add TG3_FLG2_HW_TSO flag for 5750 and newer chips that use the same TSO
	  scheme
	
	Signed-off-by: Michael Chan <mchan@broadcom.com>
	Signed-off-by: David S. Miller <davem@davemloft.net>

<davem@nuts.davemloft.net>
	[TG3]: Update driver version and reldate.
	
	Signed-off-by: David S. Miller <davem@davemloft.net>

<mchan@broadcom.com>
	[TG3]: add tg3_set_eeprom()
	
	- Add nvram size detection
	- Add appropriate byte swapping to tg3_get_eeprom so that the same byte
	stream is read in all systems
	- Fix tg3_get_eeprom to read both eeprom and flash
	- Add tg3_set_eeprom to write eeprom and flash
	- Change tg3_nvram_init to detect all supported nvram devices
	- Change tg3_nvram_read to properly detect Atmel flash that requires
	address translation
	- Increase nvram polling delay to account for slower eeprom devices
	- Remove some of the flushing read that is not required for the
	production 5750 devices
	
	Signed-off-by: Michael Chan <mchan@broadcom.com>
	Signed-off-by: David S. Miller <davem@davemloft.net>

<davem@nuts.davemloft.net>
	[TG3]: Update driver version and reldate.
	
	Signed-off-by: David S. Miller <davem@davemloft.net>

<akeptner@sgi.com>
	[TG3]: Always copy receive packets when 5701 PCIX workaround enabled.
	
	Signed-off-by: Arthur Kepner <akepner@sgi.com>
	Signed-off-by: David S. Miller <davem@davemloft.net>

<davem@nuts.davemloft.net>
	[TG3]: Update driver version and reldate.
	
	Signed-off-by: David S. Miller <davem@davemloft.net>

<davem@nuts.davemloft.net>
	[TG3]: Fix signedness issues in PHY read/write loops.
	
	Signed-off-by: David S. Miller <davem@davemloft.net>

<davem@nuts.davemloft.net>
	[TG3]: Return 0 when PHY read times out, not all-ones.
	
	Noticed by Peter Chubb.
	
	Signed-off-by: David S. Miller <davem@davemloft.net>

